1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating the same, and more specifically, it relates to a semiconductor device having an element isolation trench and a method of fabricating the same.
2. Description of the Prior Art
As the degree of integration of a semiconductor device is improved, a technique of finely working the semiconductor device is recently becoming increasingly important. Such fine working includes element isolation for isolating semiconductor elements forming the semiconductor device from each other. Following the improvement of the degree of integration of the semiconductor device, a technique referred to as trench isolation is increasingly employed for the element isolation.
This trench isolation is performed by forming an element isolation trench in a semiconductor device and embedding an insulator or the like in the formed trench. The insulator or the like embedded in the trench isolates element regions located on both sides of the trench from each other.
When a conventional trench is formed to have side surfaces perpendicular to the main surface of the semiconductor substrate, however, it is difficult to excellently embed an insulator in the trench. Therefore, the insulator may be defectively embedded in the trench. Consequently, the element isolation region cannot be properly formed.
In order to avoid the aforementioned problem of defective embedding, a technique of forming the trench in a tapered manner is proposed. When the trench formed in a tapered manner is provided with the same opening width as a perpendicularly formed trench, however, the withstand voltage (dielectric strength) of the trench is disadvantageously reduced. In order to increase the withstand voltage of the trench, the depth of the trench may be increased. When the trench is formed in a tapered manner, however, the depth of the trench is limited.
When the opening width of the trench is increased for overcoming the problem of limitation of the depth resulting from the tapered shape, refinement (improvement of the degree of integration) of the semiconductor device is disadvantageously hindered.